Founded in April of 2006, SRF Technologies is dedicated to supplying its customers the expertise needed to develop in-house ESD and I/O capabilities not typically available to small and start-up companies in the semiconductor industry.
We specialize in both ESD diagnostic and failure-analysis support, recognizing that such efforts can take months and cost tens of thousands of dollars. By employing SRF Technologies, our customers have dramatically improved their debug time as well as getting the right solution at the first redesign, saving both money and time to market.
Besides ESD failure analysis and diagnostic support, our primary areas of expertise lie in ESD design for RF and analog products, as well as very large and complex SoC's involving many domains (>30).
Extensive experience in designing ESD and I/Os to not only meet ESD requirements, such as CDM (Charge-Device Model), HBM (Human Body Model), MM (Machine Model), and CDE (speculative Cable Discharge Models), IEC 61000-4-2 system ESD, but also the rigorous demands of DFM (Design for Manufacturing), SI (Signal Integrity) and power delivery as they become increasingly difficult problems at advanced Process nodes and Interfaces.
SRF Technologies is a valuable resource to many companies looking to address these issues in a cost-effective and efficient manner.
Trained as a semiconductor Analog and RF Circuit Designer, Stephen has been developing process specific I/O and ESD libraries for 24 years. Some of his foundational training began while designing highspeed Gbps digital and 5GHz RF Interfaces in a 10kV Time-of-Flight Mass Spectrometer, while in school. After that, he joined Intel Corporation where he eventually became the lead developer of the ESD and I/O libraries for what was then Intel's wireless, cellular and mobile computing groups. He lead the development of IO and ESD used on the initial and many subsequent generations of the wireless components (MAC basebands and RF Front Ends) for the Intel Centrino chipsets, as well as Intel’s StrongARM cellular platforms. He was also personally responsible for the ESD development and I/O support for 3 families of cellular communications processors and 4 families of handheld applications processors.
He left Intel in 2006 to become an ESD and IO Consultant, working across the Industry. Some of his most notable efforts were helping companies find ESD solutions for first generation ground breaking technologies, including but not limited to ESD protection strategies on many of Qualcomms-Atheros’s early generation RF front-ends for cellular platforms; Inphi, Intel, Xilinx and Freescales (NXP) 1st generation 10, 28 and 56 Gbps Interfaces and many of Synaptics early generation Touch-Screen Interface IC’s and Touch-Display ICs.
To this day, he is the only engineer with commercially available production proven High-Voltage ESD solutions (-18V to 30V including a 100V pk-to-pk RF Switch) in standard Low Voltage 3.3V, 2.5V and 1.8V CMOS, 40nm and below, process nodes. These unique solutions have enabled a number of customers to directly interface NFC, high-voltage Analog and MEMS I/O’s directly into low voltage standard CMOS processes.
He has developed ESD process design rules, ESD libraries, and IO libraries in Logic, RF, Mixed-signal and High-Voltage BCD processes at the 0.25um, 0.18um, 0.13um, 90nm, 65nm, 45/40nm, 28nm, 22nm, 16nm, 12nm, 11nm, 7/5nm processes. Stephen is also familiar with several specialty processes, including HV BiCMOS, Flash memory, SiGe, FD-SOI, SOS and InP.
Apart from ESD and IO design, he has a done significant work in system design, including compliance testing to standards such as CE, UL and other international standards.
More information, along with customer testimonials, can be found on Stephen's LinkedIn page.
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