Delivering Excellence in I/O and ESD Design Support!

Silicon proven technology and libraries in the following processes.

TSMC 40nm customizable ESD and IO Library

A customizable ESD and IO library is available in TSMC's 40nm process variants.  ESD is available for 1.0V/1.8V/2.5V/3.3V and 5.0V applications and IO.  Both Flipchip, and wirebond technologies are supported. Included are specialty High-Speed design with >2kV HBM and >500V CDM for >20Gbit interfaces and >14GHz RF IO.

TSMC 65nm customizable ESD and IO Library

A customizable ESD and IO library is available in TSMC's 65nm process variants.  ESD is available for 1.0V/1.8V/2.5V/3.3V and 5.0V applications and IO.  Both Flipchip, and wirebond technologies are supported.

TSMC 90nm customizable ESD and IO Library

A customizable ESD and IO library is available in TSMC's 65nm process variants.  ESD is available for 1.0V/1.8V/2.5V/3.3V and 5.0V applications and IO.  Both Flipchip, and wirebond technologies are supported. 

TSMC 130nm customizable ESD and IO Library

A customizable ESD and IO library is available in TSMC's 65nm process variants.  ESD is available for 1.0V/1.8V/2.5V/3.3V/5.0V and 8.0V (non-standard) applications and IO.  Both Flipchip, and wirebond technologies are supported. 

The heart of the technology-library offerings is two fold:

Compact and Area Efficient Digital IOs:  Focused on saving area and power, while reducing noise and yet provide very reliable ESD protection.

High Perfoirmancve ESD for RF and Analog applications:  Area efficient and very robust ESD solutions for sensitive pins and IO's.  The emphasis on high performance, Low Cap ESD structures for very high performance applications is particular strength of SRF Technologies.  These structures are precision tuned to provide robust HBM, CDM and MM performance for Gigabit serial interfaces, as well as LNA's, high-frequency DAC's, ADC's, PLL's and Oscillators among others.

True to SRF Technologies approach, specific IO cells are available as canned solutions, but more importantly the Library is a fully versatile compilation of structures, sub-cells and components that are easily tailored to a custom or unique IO, padring and product design.  We realize that canned IO's are never the most efficient solutions, as such our 65nm library is developed with the idea that all structures and power bussing will be tailored and optimized for the product into which they are designed.

This is how we reduce area and deliver higher performance both for ESD robustness as well as noise, signal integrity and reduced parasitics.